DDECS-2007: April 11-13, Cracow, Poland The 10th IEEE Workshop on
Design and Diagnostics of Electronic
Circuits and Systems


April 11-13, 2007
Kraków, Poland

Topics of interest include but are not limited to:

  • ASIC/FPGA Design
  • Bio-inspired Hardware
  • Design Verification/Validation
  • Formal Methods in System Design
  • Hardware/Software Co-Design
  • IP-based Design
  • Logic Synthesis
  • Physical Design
  • Reconfigurable Computing
  • System-on-a-Chip (SoC)
  • Analog, Mixed-Signal, and RF Test
  • ATE Hardware and Software
  • Built-in Self-Test (BIST)
  • Design for Testability and Diagnosis
  • Defect/Fault Tolerance and Reliability
  • Embedded Test
  • Memory and Processor Test
  • MEMS Testing
 2007 IEEE DDECS Workshop service.  Last changes: July 23rd, 2007.   Webmaster
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